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| ICX413AQ Diagonal 28.40mm (Type 1.8) Frame Readout CCD Image Sensor with Square Pixel for Color Cameras Description The ICX413AQ is a diagonal 28.40mm (Type 1.8) interline CCD solid-state image sensor with a square pixel array and 6.15M effective pixels. Frame readout allows all pixels' signals to be output independently within approximately 1/3.08 second. Adoption of a design specially suited for frame readout ensures a high saturation signal level. High sensitivity and low dark current are achieved through the adoption of R, G and B primary color mosaic filters and HAD (Hole-Accumulation Diode) sensors. This chip is suitable for applications such as electronic still cameras, etc. Features * Frame readout mode * High horizontal and vertical resolution * Square pixel * Horizontal drive frequency: 25.0MHz * R, G, B primary color mosaic filters on chip * High sensitivity, low dark current 34 pin DIP (Plastic) Pin 1 2 V 4 20 H Pin 18 50 Optical black position Device Structure (Top View) * Interline CCD image sensor * Optical size: Diagonal 28.40mm (Type 1.8) * Total number of pixels: 3110 (H) x 2030 (V) approx. 6.31M pixels * Number of effective pixels: 3040 (H) x 2024 (V) approx. 6.15M pixels * Number of active pixels: 3032 (H) x 2016 (V) approx. 6.11M pixels * Number of recommended recording pixels: 3000 (H) x 2000 (V) approx. 6M pixels * Chip size: 25.10mm (H) x 17.64mm (V) * Unit cell size: 7.80m (H) x 7.80m (V) * Optical black: Horizontal (H) direction: Front 20 pixels, rear 50 pixels Vertical (V) direction: Front 4 pixels, rear 2 pixels * Number of dummy bits: Horizontal 31 Vertical 1 (even fields only) * Substrate material: Silicon Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E02120B35 ICX413AQ Block Diagram and Pin Configuration (Top View) GND GND GND VSUB V1 V2 V3 V4 NC NC NC NC NC NC NC NC 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 G Vertical register B G B G B G G R G R G R B G B G B G Note) R G R G R Horizontal register VL 1 Note) 18 VSS : Photo sensor 19 VOUT 20 GND 21 RG 22 GND 23 VDD 24 GND 25 LH 26 H1C 27 H2C 28 GND 29 H1B 30 H2B 31 GND 32 H1A 33 H2A 34 GND Pin Description Pin Symbol No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 VL GND NC NC V4 NC V3 NC GND V2 NC NC NC V1 NC GND VSUB GND Substrate bias Vertical register transfer clock GND Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock GND Description Protective transistor bias Pin Symbol No. 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 VSS VOUT GND RG GND VDD GND LH H1C H2C GND H1B H2B GND H1A H2A GND -2- Signal output GND Reset gate clock GND Supply voltage GND Horizontal register final stage transfer clock Horizontal register transfer clock Horizontal register transfer clock GND Horizontal register transfer clock Horizontal register transfer clock GND Horizontal register transfer clock Horizontal register transfer clock GND Description Output amplifier source ICX413AQ Absolute Maximum Ratings Item VDD, VOUT, RG - SUB Against SUB V1, V3 - SUB V2, V4, VL - SUB LH, H1, H2, GND - SUB ( = VDD, VOUT, RG - GND Against GND V1, V2, V3, V4 - GND LH, H1, H2 - GND ( = Against VL V1, V3 - VL V2, V4, LH, H1, H2, GND - VL ( = H1 - H2 ( = A, B, C) A, B, C) A, B, C) Ratings -40 to +10 -50 to +15 -50 to +0.3 -40 to +0.3 -0.3 to +18 -10 to +18 -10 to +7 -0.3 to +28 -0.3 to +15 to +15 -7 to +7 -17 to +17 -30 to +80 -10 to +60 -10 to +75 Unit V V V V V V V V V V V V C C C Remarks Voltage difference between vertical clock input pins Between input clock pins A, B, C) A, B, C) 1 H1, H2 - V4 ( = Storage temperature Guaranteed temperature of performance Operating temperature 1 +24V (Max.) when clock width < 10s, clock duty factor < 0.1%. Bias Conditions Item Supply voltage Output amplifier source Protective transistor bias Reset gate clock Symbol VDD VSS VL RG Min. 14.55 8.0 1 2 Typ. 15.0 Max. 15.45 15.0 Unit V Remarks Ground with resistance of 750 to 900 Substrate voltage adjustment range VSUB 1 VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the VL power supply for the V driver should be used. 2 Do not apply a DC bias to the reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Item Supply current Symbol IDD Min. Typ. 7.0 Max. Unit mA Remarks -3- ICX413AQ Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH1, VVH2 VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 VV Vertical transfer clock voltage VVH3 - VVH VVH4 - VVH VVHH VVHL VVLH VVLL VH Horizontal transfer clock voltage Horizontal final stage transfer clock voltage Reset gate clock voltage Substrate clock voltage VHL VCR VLHH VLHL VRG VRGLH - VRGLL VRGL - VRGLm VSUB 22.0 23.0 5.75 -0.05 4.75 5.75 -0.05 6.0 0 3.0 6.0 0 5.0 7.0 0.05 5.25 0.4 0.5 24.0 -0.25 -0.25 Min. 14.55 -0.05 -0.2 -8.5 Typ. 15.0 0 0 -8.0 8.0 0.1 0.1 0.5 0.5 0.5 0.5 7.0 0.05 Max. Unit 15.45 0.05 0.05 -7.5 V V V V V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 5 5 5 6 Low-level coupling Low-level coupling Cross-point voltage High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) VVH = (VVH1 + VVH2)/2 Remarks -4- ICX413AQ Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Symbol CV1, CV3 CV2, CV4 CV12, CV34 Capacitance between vertical transfer clocks CV23, CV41 CV13 CV24 Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks CH1 CH2 CHH Min. Typ. 18000 15000 18000 10000 6800 8200 18 27 221 8 6 2700 18 3.9 2.2 39 39 Max. Unit Remarks pF pF pF pF pF pF pF pF pF pF pF pF Capacitance between horizontal final stage transfer CLH clock and GND Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Horizontal final stage transfer clock series resistor Reset gate clock series resistor V1 CV12 V2 CRG CSUB R1, R2, R3, R4 RGND RH RLH RRG R1 R2 RH H1A RH CHH RH H2A RH H2B RH H2C CV1 CV41 CV24 CV4 R4 RGND CV34 CV2 CV23 CV13 CV3 R3 H1B RH H1C CH1 CH2 V4 V3 Vertical transfer clock equivalent circuit RRG RG Horizontal transfer clock equivalent circuit CRG Reset gate clock equivalent circuit -5- ICX413AQ Drive Clock Waveform Conditions (1) Readout clock waveform 100% 90% M VVT 10% 0% tr twh tf 0V M 2 (2) Vertical transfer clock waveform V1 V3 VVH1 VVHH VVH VVHL VVHH VVHL VVHL VVHH VVHL VVHH VVH VVH3 VVL1 VVLH VVL3 VVLH VVLL VVL VVLL VVL V2 V4 VVHH VVHH VVH VVHL VVH VVHH VVHH VVH2 VVHL VVHL VVH4 VVHL VVL2 VVLH VVLH VVLL VVL VVL4 VVLL VVL VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) -6- ICX413AQ (3) Horizontal transfer clock waveform tr H2 90% VCR VH VH 2 10% H1 two VHL twh tf twl Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two. (4) Horizontal final stage transfer clock waveform tr VLHH 90% twh tf VLH twl 10% VLHL (5) Reset gate clock waveform tr twh tf RG waveform VRGH twl VRG Point A VRGLH VRGLL VRGLm VRGL VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval with twh, then: VRG = VRGH - VRGL Negative overshoot level during the falling edge of RG is VRGLm. -7- ICX413AQ (6) Substrate clock waveform 100% 90% M VSUB 10% VSUB 0% tr twh tf M 2 Clock Switching Characteristics (Horizontal drive frequency: 25MHz) Item Readout clock Vertical transfer clock Horizontal transfer clock Symbol VT V1, V2, V3, V4 H1 H2 15 15 17 7 6 15 15 17 twh twl tr tf Unit s s ns ns ns s When draining charge 1 Remarks During readout When using CXD1268M Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 7.5 1.5 2 5 5 3 2 1.5 2 5 5 3 2 Horizontal final LH stage transfer clock Reset gate clock Substrate clock RG SUB 1 The phase of horizontal final stage transfer clock amplitude level 50% and horizontal transfer clock H2 amplitude level 50% must be matched. Item Horizontal transfer clock Symbol H1, H2 two Min. Typ. Max. 17 Unit ns Remarks Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics) 1.0 G 0.8 Relative Response R B 0.6 0.4 0.2 0 400 450 500 600 550 Wave Length [nm] 650 700 -8- ICX413AQ Image Sensor Characteristics Item G sensitivity Sensitivity comparison Saturation signal Smear Video signal shading Dark signal Dark signal shading Line crawl G Line crawl R Line crawl B Lag Symbol Sg Rr Rb Vsat Sm SHg Vdt Vdt Lcg Lcr Lcb Lag Min. 800 0.42 0.23 900 -110 -90 20 25 4 2 10 10 10 0.5 Typ. 1000 0.57 0.38 Max. 1200 0.72 0.53 mV dB % mV mV % % % % Unit mV Measurement method 1 1 2 3 4 5 6 7 7 7 8 Ta = 60C (Ta = 25C) Remarks 1/30s accumulation Frame readout mode, 1 Zone 0 and I Zone 0 to II' Ta = 60C, 3.08 frame/s Ta = 60C, 3.08 frame/s, 2 1 After closing the mechanical shutter, the smear can be reduced to below the detection limit by performing vertical register sweep operation. 2 Excludes vertical dark signal shading caused by vertical register high-speed transfer. Zone Definition of Video Signal Shading 3040 (H) 4 4 4 H 8 H 8 V 10 2024 (V) Zone 0, I Zone II, II' 4 V 10 Ignored region Effective pixel region Measurement System CCD signal output [A] CCD C.D.S AMP S/H Gr/Gb channel signal output [B] S/H R/B channel signal output [C] Note) Adjust the amplifier gain so that the gain between [A] and [B], and between [A] and [C] equals 1. -9- ICX413AQ Image Sensor Characteristics Measurement Method Measurement conditions (1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the frame readout mode is used. (2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb signal output or the R/B signal output of the measurement system. Color coding of this image sensor & Readout B2 Gb R B1 Gb R B Gr B Gr Gb R Gb R B Gr B Gr A1 A2 The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively. For frame readout, the A1 and A2 lines are output as signals in the A field, and the B1 and B2 lines in the B field. Horizontal register Color Coding Diagram - 10 - ICX413AQ Definition of standard imaging conditions (1) Standard imaging condition I: Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. G sensitivity, sensitivity comparison Set to the standard imaging condition I. After setting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screen, and substitute the values into the following formulas. VG = (VGr + VGb)/2 Sg = VG x 100 [mV] 30 Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to the standard imaging condition II: After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal outputs. Smear Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the Gr signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (Vsm [mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = 20 x log Vsm / Gra + Gba + Ra + Ba x 1 x 1 10 4 500 3. ( ) [dB] (1/10V method conversion value) 4. Video signal shading Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjusting the luminous intensity so that the average value of the Gr signal output is 150mV. Then measure the maximum value (Grmax [mV]) and minimum value (Grmin [mV]) of the Gr signal output and substitute the values into the following formula. SHg = (Grmax - Grmin)/150 x 100 [%] - 11 - ICX413AQ 5. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature of 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. Dark signal shading After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV] 6. 7. Line crawl Set to the standard imaging condition II. Adjusting the luminous intensity so that the average value of the Gr signal output is 150mV, and then insert R, G and B filters and measure the difference between G signal lines (Glr, Glg, Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula. Lci = Gli x 100 [%] (i = r, g, b) Gai 8. Lag Adjust the Gr channel output generated by the strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal amount (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) x 100 [%] VD V1 Light Strobe light timing Gr sinal ouitput 150mV Output Vlag (lag) - 12 - Drive Timing Chart (Vertical Sync Accumulation Time Control by Mechanical Shutter) Frame Readout Mode Exposure period All pixel output period VD HD 10 135 138 139 1149 1153 1155 1264 1222 1227 2241 2018 2020 2022 2024 1 2 3 "c" "a" "d" "b" V1 V2 V3 1 3 1 3 5 7 9 CCD OUT 2017 2019 2021 2023 2 4 2 4 6 8 10 - 13 - V4 VSUB Mechanical shutter OPEN CLOSE ICX413AQ Drive Timing Chart (Vertical Sync) Frame Readout Mode Vertical Sync "c" Enlarged, "d" Enlarged "c": 135H/"d": 68H H1 534 3621 1 54 534 H2 V1 V2 V3 V4 3621 1 54 - 14 - 60 #3 #4 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 "c": #2030 "d": #1015 60 #1 #2 ICX413AQ Drive Timing Chart (Vertical Sync "a" Enlarged, "b" Enlarged) "a" Enlarged 3621 1 55 H1 3621 1 55 1800 2100 2040 V1 V2 2040 V3 - 15 - 2100 2100 2040 2340 V4 "b" Enlarged V1 V2 V3 ICX413AQ V4 Drive Timing Chart (Horizontal Sync) Ignored pixel 4 bits 480 1 31 1 20 Ignored pixel 4 bits 1 H1 H2 V1 - 16 - 60 60 60 60 60 V2 V3 V4 SUB 3621 50 1 60 60 60 ICX413AQ ICX413AQ Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero-cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operations as required, and use them. a) Operate in clean environments (around class 1000 is appropriate). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. 5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical shocks. - 17 - Package Outline Unit: mm 34 Pin DIP 2.60 0.30 1.90 0.15 A to 0.77 1.50 18 D 25.00 18.6 0.3 34 ~ R0.8 ~ 3.0 23.3 0.2 24.6 + 0.4 26.25 - 0 V Metal part 0.70 0.10 17 19.00 C 1 1.20 0.15 ~ H 17 ~ 25.4 0.15 12.7 0.3 1 35.2 0.2 36.4 37.2 0.15 1.4 0.2 5.0 0.2 1.50 - 18 - B' ~ 0.77 3.0 1. "A" is the center of the effective image area. 2. The two points "B" of the package are the horizontal reference. The point "B'" of the package is the vertical reference. 3. The metal area "C" of the package bottom, and the top of the cover glass "D" are the height reference. 4. The center of the effective image area relative to "B" and "B'" is ( H, V ) = ( 18.6, 12.7 ) 0.03mm 5. The rotation angle of the effective image area relative to H and V is 1. 6. The height from the bottom "C" to the effective image area is 1.40 0.15mm. The height from the top of the cover glass "D" to the effective image area is 1.20 0.15mm. 7. The tilt of the effective image area relative to the bottom "C" is less than 150m. 8. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5. 9. The notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. 10. Metal part at the bottom of a package is sticking out 0.1mm. from the surrounding plastic part. 0.46 1.778 PACKAGE MATERIAL Plastic, Metal LEAD TREATMENT GOLD PLATING LEAD MATERIAL 42 ALLOY PACKAGE MASS 7.00g Sony Corporation DRAWING NUMBER AS-Z4(E) 17.60 11.60 B ~ 3 0.80 - 5. 0 2.25 0.15 0. 1 0 10 ICX413AQ |
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